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PDI Configuration (0x0150:0x0153)

II-36 Slave Controller – Register Description

3.28.7 Sync/Latch[1:0] PDI Configuration

Table 45: Register Sync/Latch[1:0] PDI Configuration (0x0151)

ESC20

ET1100

ET1200

IP Core

Bit

Description

ECAT

PDI

Reset Value

1:0

SYNC0 output driver/polarity:

00: Push-Pull active low

01: Open Drain (active low)

10: Push-Pull active high

11: Open Source (active high)

r/-

IP Core: 10

Others: 00, later

EEPROM ADR 0x0001

SYNC0/LATCH0 configuration*:

0: LATCH0 Input

1: SYNC0 Output

r/-

IP Core: 1

Others: 0, later

EEPROM ADR 0x0001

SYNC0 mapped to AL Event Request

0: Disabled

1: Enabled

r/-

IP Core: Depends on

configuration

Others: 0, later

EEPROM ADR 0x0001

5:4

SYNC1 output driver/polarity:

00: Push-Pull active low

01: Open Drain (active low)

10: Push-Pull active high

11: Open Source (active high)

r/-

IP Core: 10

Others: 00, later

EEPROM ADR 0x0001

SYNC1/LATCH1 configuration*:

0: LATCH1 input

1: SYNC1 output

r/-

IP Core: 1

Others: 0, later

EEPROM ADR 0x0001

SYNC1 mapped to AL Event Request

0: Disabled

1: Enabled

r/-

IP Core: Depends on

configuration

Others: 0, later

EEPROM ADR 0x0001

* The IP Core has concurrent SYNC[1:0] outputs and LATCH[1:0] inputs, independent of this configuration.

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